The present invention relates to a technique of signal transmission between devices such as multiple processors and memories (for example, between digital circuits constructed by CMOSs or between their functional blocks) in an information processing apparatus, and in particular to a technique for speeding up bus transmission in which a plurality of elements are connected to a same transmission line for transferring data. In particular, the present invention relates to a memory module having a signal generator (a directional coupler) built-in.
As a bus system that is connected with many nodes and intended for high-speed data transfer, is mentioned a non-contact bus line of U.S. Pat. No. 5,638,402. FIG. 3 shows the basic system of the conventional technique. In the conventional technique, data transmission between two nodes is realized by utilizing crosstalk, i.e., using a directional coupler. Namely, that is a technique in which transfer between a bus master 10-1 and slaves 10-2-10-8 is carried out utilizing crosstalk between two lines, i.e., between a line 1-1 and a line 1-2-1-8. This conventional technique is suitable for transfer between a bus master 10-1 and slaves 10-2-10-8, or data transfer between a memory controller and memories.
However, in the conventional technique of U.S. Pat. No. 5,638,402, the line length occupied by a directional coupler decides a module interval. Accordingly, in order to shorten the module interval, it is necessary to shorten the line length of the directional coupler. However, shorter line length becomes a cause of reducing the transmission efficiency, i.e., degree of coupling, and thus, it is impossible to make the interval less than a certain length. Thus, a first problem is that it is necessary to realize high-density mounting of memories by making intervals between memory modules smaller.
A second problem is that only a few chips can be connected for signal transmission of the RTZ (Return to Zero) system using directional couplers. In other words, it is a problem that many chips can not be connected since signal level generated in a directional coupler is low. In detail, when many chips are mounted, input capacitance of the chips becomes larger, so that the RTZ signal level becomes lower. Further, since branches for wiring arise, reflection distortion becomes larger. From those reasons, the above-mentioned problem is caused. Thus, in the case of a bus that uses directional couplers, it is a problem that bulk memory modules such as multi-bank structure can not be arranged.
Further, a third problem is that, as transmission speed becomes higher in high-speed data transmission, waveform becomes dull owing to frequency-dependent effects such as the skin effect. This is a phenomenon that pulse waveform becomes dull at its rising and falling shoulders. This influence appears as increase of skew when a receiver takes in pulse waveform. Namely, since the shoulders of pulse waveform inputted into the receiver become dull, time when a signal exceeds or falls short of the reference voltage (Vref) of the receiver increases. As a result, receiver""s take-in time increases, causing increase of the skew.
The reason why the skin effect makes the shoulders of the pulse dull is described as follows.
A high-speed pulse has a high-frequency component depending on the reciprocal of its transition (rise or fall) time. For example, the frequency band (fknee) of a pulse having the transition time Tr can be written as:
fknee=0.35/Tr
Accordingly, when it is assumed that a pulse of 1 Gbps is transmitted and 30% of it is the transition time, then, fknee=0.35/(0.3 [ns])xcx9c1 GHz. At this time, resistance increase owning to the skin effect is calculated as follows.
The volume resistivity p of copper at 20 [xc2x0C.] is 1.72xc3x9710{circumflex over (0)}xe2x88x928 [xcexa9xc2x7m]. In the case of a standard line (linewidth 0.1 [mm] and line thickness 0.030 [mm]) in a board, DC resistance becomes 5.7 [mxcexa9/mm]. Further, the resistance per unit length owing to the skin effect is:
r=2.6xc3x9710{circumflex over (0)}xe2x88x926{square root over (f)}[xcexa9/mm]
and, at 1 GHz, it becomes:
r=82 [mxcexa9/mm]
Thus, in comparison with the DC resistance 6 [mxcexa9/mm], the resistance in the transition time increases 13 times. Here, the symbol {circumflex over (0)} expresses the power.
Namely, the high resistance appears only at the transition time, and this leads to the dull waveform. This is because a resistance component becomes larger as the frequency becomes higher, thus having larger effects at rising and falling times. As a technique for overcoming this, there is a method in which a driver is used to make the pulse waveform steeper at the transition (rise and fall) times. For example, an article, xe2x80x9cLimits of Electrical Signaling (Transmitter Equalization)xe2x80x9d; IEEE HOT interconnect V (Sep. 21-23, 1997), pp. 48 describes an equalizer system using DAC (Digital Analog Converter) of a driver (transmitter). In this equalizer, the driver changes transition waveform steeply all the more when the quantity of dullness is larger. In the case of using this technique, control of the driver becomes complex and it is difficult to mount many devices on LSI.
A fourth problem is that there are signal propagation delays between a plurality of memory modules, depending on distances of their mounting positions from a memory controller. As a result, time difference are generated in read data and write data. Correction of differences in data arrival times caused by chip positions makes system design very difficult. Thus, removal of these time differences is a problem to be solved.
As a means for solving the first problem, a directional coupler is formed for a main line within a memory module, by taking in a line (main line) from a memory controller into the inside of this memory module. In other words, by placing the directional coupler not on a mother board but in the memory module, the pitch between the modules can be shortened without being limited by the length of the directional coupler and high-density mounting can be realized.
As a means for solving the second problem, a converter circuit (a transceiver) that converts an RTZ signal to an NRZ (Non Return to Zero) signal is provided on a memory module and a conventional directional coupler is formed on a mother board on which the memory module is mounted. Thus, data transfer for long line length between a memory controller and the memory module is carried out using the directional coupler, and an RTZ signal is demodulated into an NRZ signal by the transceiver placed in the memory module. Thus, within the memory module having shorter line length, data is transferred using the NRZ signal. Accordingly, even in a bus in which a directional coupler is used, many chips can be connected, and a large capacity memory module having, for example, multi-bank structure can be constructed.
As a means for solving the third problem, a directional coupler that can generate forward crosstalk is formed in a T-shape. Thus, by superimposing a backward crosstalk component and a forward crosstalk component at the time of transition of an NRZ signal, signal waveform can be sharpened to equalize dulling of the waveform owing to the skin effect etc. As a result, it is not necessary to control a driver in a special manner, and the structure of LSI becomes simple.
As a means for solving the fourth embodiment, there is provided a folded line that connects a same signal to a plurality of memory chips through directional couplers, the memory chips being located in different positions from a memory controller. Two ends of the folded line are switched with respect to connection, so that delay differences depending on the locations can be eliminated and system design becomes easy. For this end, the directional coupler is connected in a T-shaped as in the means for solving the third problem, and its characteristic that signals are generated in both directions is utilized.